Electronic simulation concept image
Siemens
The AI revolution is driving change in how we design and manufacture everything from data centers to servers and chips. Even what we consider a chip is changing from the integration of analog circuits to the use of multiple die or chiplets in a single package. While much has been said about the manufacturing of these advanced chips, less is being said about the evolution of the tools to design these chips. At the annual Design Automation Conference (DAC) in San Francisco, Siemens, one of the leaders in Electronic Design Automation (EDA), discussed its efforts to bring digital-twin multiphysics and AI into its Calibre and Solido EDA tools for these complex chip designs.
Since Siemens is a 177-year-old multinational conglomerate that has made everything from light bulbs and telegraph equipment to power generators and electric trains, it’s worth putting some context around who Siemens is today. At its heart, Siemens is a technology solutions company that combines hardware, software, and industry expertise to develop very complex solutions for a broad variety of applications. A key to Siemens’ success is a vast investment in software through both internal development and acquisition.
One area of investment is EDA tools, where Siemens became a prominent player with the acquisition of one of the industry leaders, Mentor Graphics, in 2017. Since the acquisition, Siemens has been investing heavily in EDA R&D introducing more than two dozen new EDA tools. But even before that, Siemens had acquired and continues to acquire assets that would prove to be valuable to the future of EDA tools. Siemens and previously, Mentor Graphics, have acquired more than 100 companies combined to build one of the premier EDA toolsets in the industry. And, according to the company, Siemens EDA was the first to integrate multiphysics simulation and the use of digital twins in EDA.
Siemens EDA Solutions from IC design through electronic systems
Siemens
Solido Simulation Suite
The first announcement was the introduction of the Solido Simulation Suite to the Solido family of design solutions. According to Siemens, Solido was one of the first EDA tools to leverage AI more than 15 years ago. The Solido Simulation Suite is aimed at the challenges of designing mixed signal and custom chips, or more specifically, the integrated circuits (ICs) that are the heart of the chips. By “custom ICs,” Siemens is referring to the need to develop at the transistor level as opposed to just the gates or IP blocks that are commonly used to piece together an Application Specific IC (ASIC) or System-on-Chip (SoC).
The Solido Simulation Suite includes three new AI-accelerator tools (Solido SPICE, Solido FastSPICE, and Solido LibSPICE) added to the existing AFS and Eldo SPICE and Symphony mixed-signal tools. For those not familiar with the term, “SPICE” stands for Simulation Program with Integrated Circuit Emphasis. SPICE is used to simulate the electrical behavior of all forms of electronic circuits, particularly ICs. The simulation helps check design integrity though predictive behavior. The Solido SPICE is aimed at large design models and includes a new “solver” for determining circuit values and new RF and high-speed verification capabilities. The Solido FastSPICE includes new partitioning and multi-resolution technology to allow for a faster simulation. And Solido LibSPICE is designed for batch solving smaller IC designs with optimized runtimes for Library IP. All the new tools are powered by AI models leveraging data from the semiconductor customer. And while most EDA tools are used on premises at customer locations, the tools are optimized to work in the cloud on AWS and Azure for greater flexibility and resources.
The Solido IC Verification Platform with the new Solido Simulation Suite
Siemens
The value of the new Solido SPICE is in the ability to develop more accurate simulations that include detail down to the transistor level on new IC designs. Along with this level of accuracy and resolution, it is also able to complete these simulations at 2X to 30X the speed of previous simulations. With advanced simulations often taking days to complete, the improvement is significant in terms of cost, time and resources. The Solido Simulation Suite works with the other Solido tools, including Solido Design Environment, Solido Characterization Suite, and Solido IP Validation Suite, and other Siemens EDA tools like Calibre as a tightly integrated EDA IC solution. However, Solido Sim can also be used with EDA tools from other vendors. The Solido Sim EDA tools have also been certified by several foundries, including Intel and Samsung, ensuring that IC designs are accurate and manufacturable.
Calibre 3DThermal
Most high-end data center processing and accelerator solutions have already shifted to using chiplets in 2.5D and 3D designs, and now everything from PCs to industrial IoT applications is making the transition to these types of designs to improve density, differentiation, and time-to-market. Often thermal constraints are a limiting factor in these designs. Just imagine stuffing most of the major processing elements of a PC or server into a single IC package. The increased performance, power, and density increases the potential for thermal design issues.
To address the challenges of 3D IC design, Siemens also introduced an addition to its Calibre design verification platform. Siemens enhanced Calibre with multiphysics simulation for 3D IC thermal analysis, a current gap in 3D IC design verification. By deploying the Siemens Flotherm analysis tools for electronics cooling simulation software to the Calibre IC verification suite, Siemens integrated the capability in Calibre to be able to analyze individual die within a 3D IC design and the 3D features, such as through silicon vias (TSVs) used for power distribution and die interconnects. Calibre is the first Multiphysics tool that allows designers to analyze early design choices through thermal analysis, as well as providing a final thermal signoff that can be fed into electromigration and voltage (EM/IR) tools. Additionally, Calibre 3DThermal has an embedded Simcenter Flowterm solver that can also feed data to Simcenter Flowterm for more accurate board and system level analysis.
Calibre 3D Thermal Analysis
Siemens
Calibre 3DThermal provides color maps and temperature annotations down to the transistor level to analyze when transistors are pushed out of thermal specifications in relation to the entire chiplet and 3D IC design. Another benefit of Calibre 3DThermal is that it is based on “shift-left” principles, which means it can be used throughout the design process, starting with the initial design specifications and moving through the final design. This allows for continuous analysis and iterations. And like the Solido Simulator, it can be run on-premises or in the cloud. Information from Calibre 3DThermal also allows for co-design and co-optimization with MCAD for the packaging design.
Providing chiplet thermal analysis may not only improve the design of the chiplets and packaging, but also the printed circuit board (PCB), cooling solution, system configuration, and the final product design. As with the other Calibre tools, it works in conjunction with the tools within Calibre, other Siemens EDA tools, and those of other EDA vendors. According to Siemens and its customers, Calibre 3DThermal is accurate and easy to use for analysis and debugging of designs.
A Complex Value Chain
As the requirements for systems and silicon change around the ever-increasing performance needs driven by AI and other applications, so too do the tools to design the next generation of ICs and electronic systems. Siemens continues to develop new EDA technology and tools to meet these needs and span the lifecycle of ICs from concept through verification and even integration into more complex systems. The level of integration and complexity in IC design continues to increase and improve with the use of AI and digital twin multiphysics simulation. While it is amazing what is feasible today, one can only wonder what we will be able to do over the next decade as IC integration is pushed beyond current limits.
